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G374S - 74F126 SMD Quadruple Bus Buffer Gate
The 74F126 bus buffer features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Features:
4.5-V to 5.5-V VC Operation
Max tpd of 6.5 ns at 5 V
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
SOIC 14 package. Actual brand may vary from picture.
G374S
Features:
4.5-V to 5.5-V VC Operation
Max tpd of 6.5 ns at 5 V
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
SOIC 14 package. Actual brand may vary from picture.
G374S
$0.39
G374S - 74F126 SMD Quadruple Bus Buffer Gate—
$0.39
Product Information
Product Information
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Shipping & Returns
Description
The 74F126 bus buffer features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE) input is low. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
Features:
4.5-V to 5.5-V VC Operation
Max tpd of 6.5 ns at 5 V
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
SOIC 14 package. Actual brand may vary from picture.
G374S
Features:
4.5-V to 5.5-V VC Operation
Max tpd of 6.5 ns at 5 V
3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
SOIC 14 package. Actual brand may vary from picture.
G374S
